A Level Computer Science OCR Practice Exam 2025 - Free Practice Questions and Study Guide

The choice of Reduced Instruction Set Computer (RISC) accurately reflects the architecture's defining characteristics. RISC is designed to streamline instruction execution by utilizing a smaller set of simple instructions. This simplicity allows for faster processing and efficient use of the CPU. Each instruction in a RISC architecture typically executes in a single clock cycle, which contributes to overall performance gains. The emphasis on a limited instruction set focuses on optimizing the operations that are most frequently used, reducing the complexity found in other architectures.

In contrast, Complex Instruction Set Computing (CISC) features a larger set of instructions, which can perform complex tasks in a single instruction but can lead to increased complexity in decode time and performance overhead. Parallel Processing Architecture and Distributed Computing Model also differ in nature, as they primarily focus on utilizing multiple processors or machines to handle tasks, rather than simplifying the instruction set at the individual processor level. Thus, RISC is the architecture best known for its simple design and fewer instructions.